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45 nanometer
Per the International Technology Roadmap for Semiconductors, the 45 nanometer (45 nm) technology node should refer to the average half-pitch of a memory cell manufactured at around the 2007–2008 time frame.
Matsushita and Intel started mass-producing 45 nm chips in late 2007, and AMD started production of 45 nm chips in late 2008, while IBM, Infineon, Samsung, and Chartered Semiconductor have already completed a common 45 nm process platform. At the end of 2008, SMIC was the first China-based semiconductor company to move to 45 nm, having licensed the bulk 45 nm process from IBM.
Many critical feature sizes are smaller than the wavelength of light used for lithography (i.e., 193 nm and 248 nm). A variety of techniques, such as larger lenses, are used to make sub-wavelength features. Double patterning has also been introduced to assist in shrinking distances between features, especially if dry lithography is used. It is expected that more layers will be patterned with 193 nm wavelength at the 45 nm node. Moving previously loose layers (such as Metal 4 and Metal 5) from 248 nm to 193 nm wavelength is expected to continue, which will likely further drive costs upward, due to difficulties with 193 nm photoresists.
==High-k dielectrics==
Chipmakers have initially voiced concerns about introducing new high-k materials into the gate stack, for the purpose of reducing leakage current density. As of 2007, however, both IBM and Intel have announced that they have high-k dielectric and metal gate solutions, which Intel considers to be a fundamental change in transistor design.〔(IEEE Spectrum: The High-k Solution )〕 NEC has also put high-k materials into production.
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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